(1) Field of the Invention
This invention relates generally to amplifiers and relates more specifically to low-noise CMOS amplifiers primarily for amplification of low frequency signals.
(2) Description of the Prior Art
Low noise amplifiers realized in CMOS technologies must suppress 1/f-noise and DC-offset if low frequency signals need to be processed. 1/f noise or Pink noise is a signal or process with a frequency spectrum such that the power spectral density is inversely proportional to the frequency, wherein white is the noise that has constant magnitude of power over frequency. The practice is the use of chopping or autozeroing (correlated double sampling of input offset) to eliminate the 1/f noise. The achievable noise limit by use of autozeroing is about 10 to 15 dB above the white noise of the amplifier of the Autozero circuit. This is a result of undersampling of white band noise. Chopper amplifiers have a noise limit equal to the white noise of the continuous time amplifier. The reason is that chopping is not a sampling process, but a modulation.
Chopper amplifiers exhibit the problem of gain errors due to settling if the input signal is chopped, and residual low frequency and DC-offset due to asymmetric settling time of the positive and negative chopping clock slope. Techniques like guard banding and nested chopping, or chopping combined with autozeroing are used to eliminate such residual offset. Also the gain can be calibrated or the demodulation can be adjusted in phase to minimize such errors.
It is a challenge for the designers of amplifiers to achieve low noise density below, i.e. eliminate practically 1/f noise.
There are known patents dealing with low noise amplifiers:
U.S. Patent (U.S. Pat. No. 7,795,960 to Lyden et al.) discloses a low power, low noise amplifier system including at least one amplifier having first and second differential input terminals, first and second differential output terminals and providing a differential output; first and second input capacitors interconnected with the first and second differential amplifier input terminals; first and second feedback circuits containing first and second feedback capacitors, respectively, interconnected with the amplifier differential input and output terminals; an input chopper switch circuit for receiving a low frequency differential input and selectively, alternately swapping those low frequency differential inputs through the input capacitors to the differential input terminals of the amplifier; an output chopper switch for receiving and selectively, alternately swapping the amplifier differential outputs synchronously with the input chopper switch circuit; and a low pass filter responsive to the swapped differential outputs for providing a low noise, low power amplification of the low frequency differential inputs.
U.S. Patent (U.S. Pat. No. 7,317,356 to Anath) teaches an amplifier circuit allowing for practical integrated circuit implementation of a DC-blocked, low-noise differential amplifier capable of amplifying ultra low-frequency signals and amplitudes ranging upwards of a few microvolts. DC-blocking capacitors having a capacitance value close to that of the effective input capacitance of the low-noise amplifier's inputs can be used by incorporating a positive feedback mechanism that tracks any variations in the amplifier gain or integrated circuit's technology process and lowers or cancels the input parasitic capacitances. Advantageously, the parasitic capacitance of transistors, typically field effect transistors, located on an integrated circuit chip is used in the feedback mechanism. This reduces the capacitive voltage division loss of the signal at the input of the amplifier while still allowing for the use of very small values of DC-blocking capacitance. No other active elements other than the amplifier itself are required to attain a low area, integrated circuit implementation of a DC-blocked, yet ultra low-frequency high pass filtered, low-noise amplifier.
U.S. Patent (U.S. Pat. No. 7,847,628 to Denison) proposes a chopper stabilized instrumentation amplifier. The amplifier is configured to achieve stable measurements at low frequency with very low power consumption. The instrumentation amplifier uses a differential architecture and a mixer amplifier to substantially eliminate noise and offset from an output signal produced by the amplifier. Dynamic limitations, i.e., glitching, that result from chopper stabilization at low power are substantially eliminated through a combination of chopping at low impedance nodes within the mixer amplifier and feedback. The signal path of the amplifier operates as a continuous time system, providing minimal aliasing of noise or external signals entering the signal pathway at the chop frequency or its harmonics. The amplifier can be used in a low power system, such as an implantable medical device, to provide a stable, low-noise output signal.
U.S. Patent Publication (US 2001/0011923 to Bakker et al.) and U.S. Patent (U.S. Pat. No. 6,262,626 to Bakker et al.) teach an amplifier provided with a pair of choppers in order to reduce the DC-offset and the noise produced by the amplifier. To obtain an optimal noise reduction the pair of choppers operate on a high frequency. As a result the DC-offset cancellation is not optimal because a so-called charge injection of the switches in the pair of choppers produces a DC-offset. To overcome this problem the amplifier is further provided with further offset cancellation means which are for example formed by a further pair of choppers. This further pair of choppers operates on a relatively low frequency. The combination of the pair of choppers and the further pair of choppers guarantees an optimal DC-offset cancellation as well as an optimal noise cancellation.
Furthermore the following publications are known:    C. C. Enz, G. C. Temes: Circuit Techniques for Reducing the effects of OP-Amp imperfections: Autozeroing Correlated double Sampling, and Chopper Stabilization. Proceedings of the IEEE, Vol. 84, No. 11, November 1996.    K. Makinwa: Dynamic Offset-Cancellation Techniques. TU-Delft. Presentation at Smart Sensor Systems 2002.    C. C. Enz, E. A. Vittoz, F. Krummenacher: A CMOSA Chopper Amplifier, IEEE Journal of Solid-State Circuits, Vol. SC-22, No. 3, June 1987.    C. A. Gobet: Spectral Distribution of a sampled 1st order lowpass filtered with noise. Electronics letters, Vol. 17, no. 19, Sep. 17, 1981    J. F. Witte, K. A. A. Makinwa, J. H. Huijsing: A CMOS Chopper Offset-Stabilized OP-Amp. IEEE Journal of Solid-State Circuits, Vol. SC-42, No. 7, July 2007.